How to make a better device
Low cost,
more compact and use less area !
Good performance,
faster and less power consumed !
The time delay and area for the
simple device
nnAnt d 2210 2 nnAnt d 22111
Fan-in,The input numbers of a
single gate
When fan-in decrease,the device is better !
The time delay is proportional to the fan-in !
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The Logic area is proportional to the square
of fan-in !
Use parallel design to limit
the fan-in
If the fan-in is greater than 5,it should be
instead by parallel circuit !
80
84
A
td
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A
t d
Use parallel design for
positive output gate
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The fan-in should be less than 4 !
Use parallel design for AO
structures
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A
t d
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A
t d
The AO structures always implemented
by NAND-NAND structures.
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A
t d
CMOS transmission gate and
three state gate
Three state buffer Three state inverter
6
36
A
td
The R may increase !
15
36
A
td
XOR gate Simple Multiplexes
2136 At d
Similar as NAND(3)!
Fan out,input numbers
driven by one output
The capacitors of interconnect line are much
larger than the capacitors in the logic cells !
Make the driven strength of
the output larger
Use inverters as buffer !
Use buffers to limit the fan-out
Let the fan-out less than 4 !
Dynamic power consumption
fVCCPPP CCLPDLD 2?
Power consumption is come from current:
when the state is changed,the capacitors
are charging or unchanging !
If a input is not used?
Must connected it to some where !
Or the gate may be damaged !
Bipolar logic
Other digital circuit
Simple,fast,but the driving ability is weak !
Transistor-Transistor Logic,TTL circuit
Other digital circuit
faster,more complex,more power consumption !
Not so compact as CMOS !
Emitter-Coupled Logic,ECL circuit
Other digital circuit
fastest,power consumption is the largest !