Kurumbalapitiya, D., Hoole, S.R.H. “Data Acquisition” The Electrical Engineering Handbook Ed. Richard C. Dorf Boca Raton: CRC Press LLC, 2000 84 Data Acquisition 84.1 Introduction 84.2 The Analog and Digital Signal Interface 84.3 Analog Signal Conditioning 84.4 Sample-and-Hold and A/D Techniques in Data Acquisition 84.5 The Communication Interface of a Data Acquisition System 84.6 Data Recording 84.7 Software Aspects 84.1 Introduction Data acquisition includes everything from gathering data, to transporting it, to storing it. The term data acquisition is described as the “phase of data handling that begins with sensing of variables and ends with a magnetic recording of raw data, may include a complete telemetering link” (McGraw-Hill, Dictionary of Scientific and Technical Terms, Second Edition, 1978). Here, the term variables refers to those physical quantities that are associated with a natural or artificial process. A data acquisition phase involves a real-time computing envi- ronment where the computer must be keyed to the time scale of the process. Figure 84.1 gives a simplified block diagram of a data acquisition system current in the early 1990s. The path the data travels through the system is called the data acquisition channel. Data are first captured and subsequently translated into usable signals using transducers. In this discussion, usable signals are assumed to be electrical voltages, either unipolar (that is, single ended, with a common ground so that we need just one lead wire to carry the signal) or bipolar (that is, common mode, with the signal carried by a wire pair, so that the reference of the rest of the system is not part of the output). These voltages can be either analog or digital, depending on the nature of the measurand (the quantity being captured). When there is more than one analog input, they are subsequently sent to an analog multiplexer (MUX). Both the analog and the digital signals are then conditioned using signal conditioners. There are two additional steps for those conditioned analog signals. First they must be sampled (see Chapter 73.4) and next converted to digital data. This conversion is done by analog-to-digital converters (ADC) (see Chapter 32). Once the analog-to-digital conversion is done, the rest of the steps have to deal with digital data only. The calendar/clock block shown in Fig 84.1 is used to add the time-of-date information, an important parameter of a real-time processing environment, into the half-processed data. The digital processor performs the overall system control tasks using a software program, which is usually called system software. These control tasks also include display, printer, data recorder, and communication interface management. A well-regulated power supply unit (PSU) and a stable clock are essential components in many data acquisition systems. There are systems where massive amounts of data points are produced within a very short period of time, and they are equipped with on-board memory so that a considerable amount of data points can be stored locally. Data are transmitted to the host computer once the local storage has reached its full capacity. Historically, data acquisition evolved in modular form, until monolithic silicon came along and reduced the size of the modules. Dhammika Kurumbalapitiya Harvey Mudd College S. Ratnajeevan H. Hoole Harvey Mudd College ? 2000 by CRC Press LLC The analysis and design of data acquisition systems is a discipline that has roots in the following subject areas: signal theory, transducers, analog signal processing, noise, sampling theory, quantizing and encoding theory, analog- to-digital conversion theory, analog and digital electronics, data communication, and systems engineering. Cost, accuracy, bit resolution, speed of operation, on-board memory, power consumption, stability of operation under various operating conditions, number of input channels and their ranges, on-board space, supply voltage require- ments, compatibility with existing bus interfaces, and the types of data recording instruments involved are some of the prime factors that must be considered when designing or buying a data acquisition system. Data acquisition systems are involved in a wide range of applications, such as machine control, robot control, medical and analytical instrumentation, vibration analysis, spectral analysis, correlation analysis, transient analysis, digital audio and video, seismic analysis, test equipment, machine monitoring, and environmental monitoring. 84.2 The Analog and Digital Signal Interface The data acquisition system must be designed to match the process being measured as well as the end-user requirements. The nature of the process is mainly characterized by its speed and number of measuring points, whereas the end-user requirement is mainly the flexibility in control. Certain processes require data acquisition with no interruption where computers are used in controlling. On the other hand, there are cases where the acquisition starts at a certain instance and continues for a definite period. In this case the acquisition cycle is repeated in a periodic manner, and it can be controlled manually or by software. Controllers access the process via the analog and digital interface submodules, which are sometimes called analog and digital front ends. Many applications require information capturing from more than one channel. The use of the analog MUX in Fig. 84.1 is to cater to multiple analog inputs. A detailed diagram of this input circuitry is shown in Fig. 84.2 FIGURE 84.1 The block diagram of a data acquisition system. ? 2000 by CRC Press LLC and the functional description is as follows. When the MUX is addressed to select an input, say, x i (t), the same address will be decoded by the decoding logic to generate another address, which is used in addressing the programmable register. The programmable register contains further information regarding how to handle x i (t). The outcome of the register is then used in subsequent tuning of the signal conditioner. Complex programmable control tasks might include automatic gain selection for each channel, and hence the contents of this register are known as the channel gain list. The MUX address generator could be programmed in many ways, and one simple way is to scan the input channels in a cyclic fashion where the address can be generated by means of a binary counter. Microprocessors are also used in addressing MUXs in applications where complex channel selection tasks are involved. Multiplexers are available in integrated circuit form, though relay MUXs are widely used because they minimize errors due to cross talk and bias currents. Relay MUX modules are usually designed as plugged-in units and can be connected according to the requirements. There are applications where the data acquisition cycle is triggered by the process itself. In this case an analog or digital trigger signal is sent to the unit by the process, and a separate external trigger interface circuitry is supplied. The internal controller assumes its duties once it has been triggered. It takes a finite time to settle the signal x i (t) through the MUX up to the signal conditioner once it is addressed. Therefore, it is possible to process x i–1 (t) during the selection time of x i (t) for greater speeds. This function is known as pipelining and will be illustrated in Section 84.3. In some data acquisition applications the data acquisition module is a plugged-in card in a computer, which is installed far away from the process. In such cases, transducers—the process sensing elements—are connected to the data acquisition module using transmission lines or a radio link. In the latter case a complete demodu- lating unit is required at the input. When transmission lines are used in the interconnection, care must be taken to minimize electromagnetic interference since transmission lines pick up noise easily. In the case of a single- ended transducer output configuration, a single wire is adequate for the signal transmission, but a common ground must be established between the two ends as given in Fig. 84.3(a). For the transducers that have common mode outputs, a shielded twisted pair of wires will carry the signal. In this case, the shield, the transducer’s encasing chassis, and the data acquisition module’s reference may be connected to the same ground as shown in Fig. 84.3(c). In high-speed applications the transmission line impedance should be matched with the output impedance of the transducer in order to prevent reflected traveling waves. If the transducer output is not strong enough to transmit for a long distance, then it is best to amplify it before transmission. Transducers that produce digital outputs may be first connected to Schmitt trigger circuits for pulse shaping purposes, and this can be considered as a form of digital signal conditioning. This becomes an essential requirement when such inputs are connected through long transmission lines where the line capacitance significantly affects the rising and falling edges of the incoming wave. Opto-isolators are sometimes used in coupling when the voltage levels of the two sides of the transducer and the input circuit of the data acquisition unit do not match each other. Special kinds of connectors are designed and widely used in interconnecting FIGURE 84.2 Analog input circuitry—the analog front end. ? 2000 by CRC Press LLC transmission lines and data acquisition equipment in order to screen the signals from noise. Analog and digital signal grounds should be kept separate where possible to prevent digital signals from flowing in the analog ground circuit and including spurious analog signal noise. 84.3 Analog Signal Conditioning The objective of an analog signal conditioner is to increase the quality of the transducer output to a desired level before analog-to-digital conversion. A signal conditioner mainly consist of a preamplifier, which is either an instrumentation amplifier or an operational amplifier and/or a filter. Coupling more and more circuits to the data acquisition channel has to be done taking great care that these signal conditioning circuits do not add more noise or unstable behavior to the data acquisition channel. General purpose signal conditioner modules are commercially available for applications. Some details were given in the previous section about programmable signal conditioners and the discussion is continued here. Figure 84.4 shows an instrumentation amplifier with programmable gain where the programs are stored in the channel-gain list. The reason for having such sophistication is to match transducer outputs with the maximum allowable input range of the ADC. This is very important in improving accuracy in cases where transducer output voltage ranges are much smaller than the full-scale input range of an ADC, as is usually the case. Indeed, this is equally true for signals that are larger than the full-scale range, and in such cases the amplifier functions as an attenuator. Furthermore, the instrumentation amplifier converts a bipolar voltage signal into a unipolar voltage with respect to the system ground. This action will reduce a major control task as far as the ADC is concerned; that is, the ADC is always sent unipolar voltages, and hence it is possible to maintain unchanged the mode control input which toggles the ADC between the unipolar and bipolar modes of an ADC. FIGURE 84.3 (a) Connecting transducers to the data acquisition unit, (b) single-ended (unipolar) output, and (c) com- mon-mode (bipolar) output. FIGURE 84.4 Programmable gain instrumentation amplifier. ? 2000 by CRC Press LLC Values of the signal-to-noise ratio (84.1) at the input and the output of the instrumentation amplifier are related to its common-mode rejection ratio (CMRR) given by (84.2) Hence, higher values of SNR output indicate low noise power. Therefore, instrumentation amplifiers are designed to have very high CMRR figures. The existence of noise will result in an error in the ADC output. The allowable error is normally expressed as a fraction of the least significant bit (LSB) of the code such as ±(1/X)LSB. The amount of error voltage (V error ) corresponding to this figure can be found considering the bit resolution (N) and the ADC’s maximum analog input voltage (V max ) as given in (84.3) Other specifications of amplifiers include the temperature dependence of the input offset voltage (V offset , mV/°C) and the current (I offset , pA/°C) associated with the operational amplifiers in use. High slew rate (V/ms) amplifiers are recommended in high-speed applications. Generally, the higher the bandwidth, the better the performance. Cascading a filter with the preamplifier will result in better performance by eliminating noise. Active filters are commonly used because of their compact design, but passive filters are still in use. The cut-off frequency, f c , is one of the important performance indices of a filter that has to be designed to match the channel’s requirements. The value f c is a function of the preamplifier bandwidth, its output SNR, and the output SNR of the filter. 84.4 Sample-and-Hold and A/D Techniques in Data Acquisition Sample-and-hold systems are primarily used to maintain a constant magnitude representing the input, across the input of the ADC throughout a precisely known period of time. Such systems are called sample-and-hold amplifiers (SHA), and their characteristics are crucial to the overall system accuracy and reliability of digital data. The SHA is not an essential item in applications where the analog input does not vary more than ±(1/2)LSB of voltage. As the name indicates, a SHA operates in two different modes, which are digitally controlled. In the sampling mode it acts as an input voltage follower, where, once it is triggered into its hold mode, it should ideally retain the signal voltage level at the time of the trigger. When it is brought back into the sampling mode, it instantly assumes the voltage level at the input. Figure 84.5 shows the simplified circuit diagram of a monolithic sampling-and-hold circuit and the associated switching waveforms. The differential amplifiers function as input and output buffers, and the capacitor acts as the storage mechanism. When the mode control switch is at its on position, the two buffers are connected in series and the capacitor follows the input with minimum time delay, if it is small. Now, if the mode control is switched off, the feedback loop is interrupted, and the capacitor ideally retains its terminal voltage until the next sampling signal occurs. Leakage and bias currents usually cause the capacitor to discharge and or charge in the hold mode and the fluctuation of the hold voltage is called droop, which could be minimized by having a SNR RMS signal RMS noise = é ? ê ê ù ? ú ú 2 CMRR= SNR SNR output input V V X N error volts=± ′ é ? ê ê ù ? ú ú max –21 1 ? 2000 by CRC Press LLC large capacitor. Therefore, the capacitance has to be selected such that the circuit performs well in both modes. Several time intervals are defined relative to the switching waveform of SHAs. The acquisition time (t a ) is the time taken by the device to reach its final value after the sample command has been given. The setting time (t s ) is the time taken to settle the output. The aperture uncertainty or aperture jitter (t us ) is the range of variation of the aperture time. It is important to note here that the sampling techniques have a well-formulated theoretical background. ADCs perform a key function in the data acquisition process. The application of various ADC technologies in a data acquisition system depends mainly on the cost, bit resolution, and speed. Successive approximation types are more common at high resolution at moderate speeds (<1 MHz). This kind of ADC offers the best trade-offs among bit resolution, accuracy, speed, and cost. Flash converters, on the other hand, are best suited for high-speed applications. Integrating-type converters are suitable for high-resolution and -accuracy applications. Many techniques have been developed in coupling sample-hold circuits and ADCs in data acquisition systems because no single ADC or sampling technology is able to satisfy the ever increasing requirements of data acquisition applications. Figure 84.6 illustrates the various sampling and ADC configurations used in practice. It can be seen that the sampling frequencies are increased because of pipelining, parallelism, or concurrent architecture. The increase in the sampling frequency improves the bandwidth, improving in turn the SNR in the channel. 84.5 The Communication Interface of a Data Acquisition System The communication interface is the module through which the acquired data are sent as well as other control tasks are established between the data acquisition module and the host computer (Fig. 84.1). There are basically two different ways of establishing a data link between the two. One way is to use interrupts and the other is through direct memory access (DMA). In the case of an interrupt-driven mode, an interrupt-request signal is sent to the computer. Upon receiving it, the computer will first finish the execution of the current instruction, suspend the next, and then send an interrupt-acknowledge signal asking the module to send data. The operation is asynchronous since the sender sends data when it wants to do so. Getting the computer ready to receive data is known as handshaking. In the case of a DMA transfer, the DMA controller is given the starting address of the memory location where the data have to be written. The DMA controller asks the computer to freeze its operations until it has finished writing data directly into the memory. The operation does not need any waiting time and therefore it is fast. Data acquisition systems are usually designed to couple with existing computer systems, and many computer systems provide standard bus architecture, allowing users to connect various peripherals that are compatible with its bus. Data acquisition systems are computer peripherals that follow the above description. Since ADCs produce parallel data, many data acquisition systems provide outputs compatible with parallel instrument buses such as the IEEE-488 (HP-IB or GPIB) or the VMEbus. Personal computer-based data acquisition boards must have communication interfaces compatible with the computer bus in order to share resources. The RS-232 standard communication interfaces are widely used in serial data transfer. Communication interfaces for data acquisition systems are normally designed to satisfy the electrical, mechanical, and protocol standards of the interface bus. Electrical standards include power supply requirements, methods of supply, the data transfer rate (baud rate), the width of the address, and the line terminating impedance. Mechanical requirements are the FIGURE 84.5 Sample-and-hold circuit diagram and switching waveforms. ? 2000 by CRC Press LLC type, size, and the pin assignments of the connectors. The data transfer protocol determines the procedure of data transfer between the two systems. A definition of the timing and input–output philosophy—whether the transfer is in synchronous, asynchronous, or quasi-synchronous mode and how errors are detected and han- dled—are important factors to be considered. 84.6 Data Recording It is important to provide storage media to cater to large streams of data being produced. Data acquisition systems use graph paper, paper tapes, magnetic tapes, magnetic floppy disks, hard disks, or any combination of these as their data recorders. Paper and magnetic tape storage schemes are known as sequential access storage, whereas disk storage is called direct access storage. Tapes are cost-effective media compared to disk drives and are still in wide use. In many laboratory situations it will be much more cost effective to network a number of systems to a single, high-capacity hard drive, which acts as a file server. This adoption of digital recording provides the ultimate in signal-to-noise ratio, accuracy of signal waveform and freedom from tape transfer flutter. Data storage capacity, access time, transfer rate, and error rate are some of the performance indices that are associated with these devices. 84.7 Software Aspects So far the discussion has been mainly on the hardware side of the data acquisition system. The other most important part is the software system associated with a data acquisition system, which can generally be divided into two—the system software and the user-interface program. Both must be designed properly in order to achieve the maximum use of the system. The system software is mainly written in assembly language with many FIGURE 84.6 Coupling techniques for SHA and ADC systems. ? 2000 by CRC Press LLC lines of code, whereas the user interface is built using a high-level software development tool. One main part of system software is written to handle the input–output (I/O) operations. The use of assembly language results in the fast execution of I/O commands. The I/O software has to deal with how the basic input–output programming tasks such as interrupt and DMA handling are done. The other aspects of system software are to perform the internal control tasks such as providing trigger pulses for the ADC and SHA, addressing the input multiplexer, the accessing and editing of the channel-gain list, transferring data into the on-board memory, and the addition of the clock/calendar information into data. Multitasking software programs are best suited for many data acquisition systems because it may be necessary to read data from the data acquisition module and display and print it at the same time. Menu-driven user interfaces are common and have a variety of functions built into them. Defining Terms Analog-to-digital converter (ADC): A device that converts analog input voltage signals into digital form. Common-mode rejection ratio (CMRR): A measure of quality of an amplifier with differential inputs and defined as the ratio between the common-mode gain and the differential gain. Direct memory access (DMA): The process of sending data from an external device into the computer memory with no involvement of the computer’s central processing unit. Least significant bit (LSB): The 2 0 th bit in a digital word. Multiplexer (MUX): A combinational logic device with many input channels and usually just one output. The function performed by the device is connecting one and only one input channel at a time to the output. The required input channel is selected by sending the channel address to the MUX. Power supply unit (PSU): The one that generates the necessary voltage levels required by a system. Sample-and-hold amplifier (SHA): A unity gain amplifier with a mode control switch where the input of the amplifier is connected to a time-varying voltage signal. A trigger pulse at the mode control switch causes it to read the input at the instance of the trigger and maintain that value until the next trigger pulse. Signal-to-noise ratio (SNR): The ratio between the signal power and the noise power at a point in the signal traveling path. Related Topics 32.1 D/A and A/D Circuits ? 69.2 Radio ? 70.1 Coding ? 80.1 Integrated Circuits (RAM, ROM) References For further reading consult the following texts, which were used along with the authors’ experience and other sources as a basis for this article: Analog Devices, Data Conversion Handbook, Analog Devices, Inc., 1989/90. R. Annino and R. Driver, Scientific and Engineering Applications with Personal Computers, New York: Wiley Interscience, 1986. D. L. Feucht, Handbook of Analog Circuit Design, San Diego: Academic Press, 1990. D. G. Fink and D. Christiansen (eds.), Electronics Engineers’ Handbook, 3rd ed., New York: McGraw-Hill, 1989. P. M. Garrett, Analog Systems for Microprocessor and Minicomputers, Reston, Va.: Reston Publishing Company, 1978. P. Holloway, “Technology focus interview,” Electronic Engineering, December 1990. F. Jorgensen, The Complete Handbook of Magnetic Recording, 4th ed., Blue Ridge Summit, Penn.: Tab Books, 1995. F. F. Mazda, Electronic Instruments and Measurement Techniques, New York: Cambridge University Press, 1987. D. A. Mellichamp (ed.), Real-Time Computing With Applications to Data Acquisition and Control, New York: Van Nostrand Reinhold, 1983. M. Tatkow and J. Turner, “New techniques for high-speed data acquisition,” Electronic Engineering, September 1990. Further Information To probe further in the subject area, refer to the Data Acquisition Handbook, published by Data Translation, Marlboro, Mass., 1990, and the Data Acquisition Handbook, published by Rector Press, 1995. ? 2000 by CRC Press LLC