Copyright ? 1997 Altera Corporation
9/12/97
Setup/Hold Time Problem
Danny Mok
Altera HK FAE
(dmok@altera.com)
Copyright ? 1997 Altera Corporation
9/12/97
Example 1
Is the design simple enough to course any error?
Any Setup/Hold time problem?
Copyright ? 1997 Altera Corporation
9/12/97
Let us take a look
Remember to turn on this Setup/Hold time
check option
What? I get Setup/Hold time problem?
Copyright ? 1997 Altera Corporation
9/12/97
OK,What can I do?
Look at the Setup/Hold time Matrix from the Timing Analysis
Setup time = 2.2ns
Hold time = 0.7ns
Copyright ? 1997 Altera Corporation
9/12/97
My Waveform Input
Setup time = 2ns Hold time = 0.1ns
According to Setup/Hold Matrix
Setup time needs = 2.2ns
Hold time needs = 0.7ns
How to fix?
It is easy,Extend the Setup time from 2ns to 2.2ns
Extend the Hold time from 0.1ns to 0.7ns
Copyright ? 1997 Altera Corporation
9/12/97
Correct Waveform
Extend the Setup/Hold time to remove the error
We fix the simulation error,But do we really fix the error yet?
Simulation, means all the INPUT WAVEFORM is designer provided,We can easily adjust the INPUT
WAVEFORM to remove the simulation error,We need to confirm that the REAL INPUT WAVEFORM
fullfil the Setup/Hold time requirement,If not we need to CONTROL THE LOGIC PLACEMENT
to fullfil the real time signal
Copyright ? 1997 Altera Corporation
9/12/97
Example 2
All the Setup/Hold prblem between this
two FF
Copyright ? 1997 Altera Corporation
9/12/97
How to fix the problem
Let us run the Register Performance Timing Analysis
The Input Clock Frequency is
only 3.2ns width ~300MHz
Copyright ? 1997 Altera Corporation
9/12/97
Conclusion
? If the Setup/Hold time error happen on the Input
Register (Example 1)
– run the Setup/Hold time Matrix to get information
– adjust the Input Waveform but double confirm with the real
time operation signal
? If the Setup/Hold time error happen between Two
Register (Example 2)
– run the Register Performance to get Fmax
– make sure that the input clock frequency is less than or equal
to the Fmax