Copyright ? 1997 Altera Corporation
3/3/2011
Third Party EDA Tools
Interface with
Altera Max+Plus II
Danny Mok
Altera HK FAE
(dmok@altera.com)
Copyright ? 1997 Altera Corporation
3/3/2011
What Altera Support
? Altera Max+Plus II support 3rd Party EDA tools
through EDIF
? EDIF is a standard file transfer format between
different EDA tools
Altera Max+Plus II
Synopsys
Cadence
Mentor Graphic
EDIF
Copyright ? 1997 Altera Corporation
3/3/2011
Is it so simple?!?!
? Is it true that EDIF can handle all the different EDA
tools conversion
? Answer is Yes and No
? Yes -- bascially all the EDA tools can accept EDIF file
and understand it
? No -- EDA only provide major information to the EDA
tools,except the EDIF file,we also need to provide a
file name as,LMF” -- Library Mapping File
Copyright ? 1997 Altera Corporation
3/3/2011
What is LMF -- Library Mapping File
? LMF is a kind of
– pin to pin mapping
– gate to gate mapping
– Power and Ground signal mapping
? Pin to Pin Mapping
– A->1,B->2,C->3
? Gate to Gate Mapping
– AND2 -> 2AND
? Power and Ground signal
Mapping
– Vcc -> Vdd
– Gnd -> Dgnd
Two Input AND gate
Altera EDA tools
ABC EDA tools
A
B
C
2AND
1
2 3
Copyright ? 1997 Altera Corporation
3/3/2011
Example of LMF
% 1-bit full adder %
BEGIN
FUNCTION 7482 (A2,A1,B2,B1,C0)
RETURNS (SUM2,SUM1,C2)
FUNCTION "ad01d1" ("GND","a","GND","b","ci")
RETURNS ("","s","co")
END
% 2-bit full adder %
BEGIN
FUNCTION 7482 (A2,A1,B2,B1,C0)
RETURNS (SUM2,SUM1,C2)
FUNCTION "ad02d1" ("a1","a0","b1","b0","ci")
RETURNS ("s1","s0","co")
END
Altera Library
The other EDA Library
Copyright ? 1997 Altera Corporation
3/3/2011
Who provides the LMF
? Altera will provide LMF for
some commonly use EDA
tools
– Cadence
– Exemplar
– Mentor Graphics
– Synopsys
– Synplicity
– Viewlogic
? But some minority EDA
tools need to provide by
– EDA vendor
– create by the customer itself
Copyright ? 1997 Altera Corporation
3/3/2011
Example, Synopsys interface with Altera
Copyright ? 1997 Altera Corporation
3/3/2011
Design Interface
Copyright ? 1997 Altera Corporation
3/3/2011
Processing Interface
Copyright ? 1997 Altera Corporation
3/3/2011
Simulation Interface
Copyright ? 1997 Altera Corporation
3/3/2011
Step 1 -- Read in the Synopsys EDIF
Copyright ? 1997 Altera Corporation
3/3/2011
Step 2 -- Open the Compiler Window
Click the,Interface” Option
Copyright ? 1997 Altera Corporation
3/3/2011
Step 3 -- Select the LMF
Select the EDA vendor’s LMF
Copyright ? 1997 Altera Corporation
3/3/2011
Step 4 -- that it,you can compile the design
Copyright ? 1997 Altera Corporation
3/3/2011
If I want to provide custom make LMF
Select the LMF as you want
Copyright ? 1997 Altera Corporation
3/3/2011
Max+Plus II can IN/OUT
Max+Plus II take the EDIF file
Max+Plus II can output EDIF file
Max+Plus II can output Verilog HDL file
Max+Plus II can output VHDL file
Copyright ? 1997 Altera Corporation
3/3/2011
Conclusion
? Altera Max+Plus II interface the other EDA tools with
– EDIF
– LMF
? You can also output EDIF from Max+Plus II to other
EDA tools
– but Altera does not provide the corresponding LMF file
? But you can output VHDL or Verilog file instead of
EDIF file
3/3/2011
Third Party EDA Tools
Interface with
Altera Max+Plus II
Danny Mok
Altera HK FAE
(dmok@altera.com)
Copyright ? 1997 Altera Corporation
3/3/2011
What Altera Support
? Altera Max+Plus II support 3rd Party EDA tools
through EDIF
? EDIF is a standard file transfer format between
different EDA tools
Altera Max+Plus II
Synopsys
Cadence
Mentor Graphic
EDIF
Copyright ? 1997 Altera Corporation
3/3/2011
Is it so simple?!?!
? Is it true that EDIF can handle all the different EDA
tools conversion
? Answer is Yes and No
? Yes -- bascially all the EDA tools can accept EDIF file
and understand it
? No -- EDA only provide major information to the EDA
tools,except the EDIF file,we also need to provide a
file name as,LMF” -- Library Mapping File
Copyright ? 1997 Altera Corporation
3/3/2011
What is LMF -- Library Mapping File
? LMF is a kind of
– pin to pin mapping
– gate to gate mapping
– Power and Ground signal mapping
? Pin to Pin Mapping
– A->1,B->2,C->3
? Gate to Gate Mapping
– AND2 -> 2AND
? Power and Ground signal
Mapping
– Vcc -> Vdd
– Gnd -> Dgnd
Two Input AND gate
Altera EDA tools
ABC EDA tools
A
B
C
2AND
1
2 3
Copyright ? 1997 Altera Corporation
3/3/2011
Example of LMF
% 1-bit full adder %
BEGIN
FUNCTION 7482 (A2,A1,B2,B1,C0)
RETURNS (SUM2,SUM1,C2)
FUNCTION "ad01d1" ("GND","a","GND","b","ci")
RETURNS ("","s","co")
END
% 2-bit full adder %
BEGIN
FUNCTION 7482 (A2,A1,B2,B1,C0)
RETURNS (SUM2,SUM1,C2)
FUNCTION "ad02d1" ("a1","a0","b1","b0","ci")
RETURNS ("s1","s0","co")
END
Altera Library
The other EDA Library
Copyright ? 1997 Altera Corporation
3/3/2011
Who provides the LMF
? Altera will provide LMF for
some commonly use EDA
tools
– Cadence
– Exemplar
– Mentor Graphics
– Synopsys
– Synplicity
– Viewlogic
? But some minority EDA
tools need to provide by
– EDA vendor
– create by the customer itself
Copyright ? 1997 Altera Corporation
3/3/2011
Example, Synopsys interface with Altera
Copyright ? 1997 Altera Corporation
3/3/2011
Design Interface
Copyright ? 1997 Altera Corporation
3/3/2011
Processing Interface
Copyright ? 1997 Altera Corporation
3/3/2011
Simulation Interface
Copyright ? 1997 Altera Corporation
3/3/2011
Step 1 -- Read in the Synopsys EDIF
Copyright ? 1997 Altera Corporation
3/3/2011
Step 2 -- Open the Compiler Window
Click the,Interface” Option
Copyright ? 1997 Altera Corporation
3/3/2011
Step 3 -- Select the LMF
Select the EDA vendor’s LMF
Copyright ? 1997 Altera Corporation
3/3/2011
Step 4 -- that it,you can compile the design
Copyright ? 1997 Altera Corporation
3/3/2011
If I want to provide custom make LMF
Select the LMF as you want
Copyright ? 1997 Altera Corporation
3/3/2011
Max+Plus II can IN/OUT
Max+Plus II take the EDIF file
Max+Plus II can output EDIF file
Max+Plus II can output Verilog HDL file
Max+Plus II can output VHDL file
Copyright ? 1997 Altera Corporation
3/3/2011
Conclusion
? Altera Max+Plus II interface the other EDA tools with
– EDIF
– LMF
? You can also output EDIF from Max+Plus II to other
EDA tools
– but Altera does not provide the corresponding LMF file
? But you can output VHDL or Verilog file instead of
EDIF file