合肥工业大学：EDA技术与应用（精品课程）：p073_ex4_5_e_name

VHDL code position: p73_ex4_5_e_name ------------------------------------------------------------------------------- ENTITY e_name IS PORT ( p_name1 : port_m1 data_type; p_name2 : port_m2 data_type; ...... p_namei : port_mi data_type ); END ENTITY e_name;