VHDL code position: p130_ex5_16_tristate2 Note: 1: the code is 4 channel tri-state bus driver 2: this is error code, compare with example 5_17 !!! ------------------------------------------------------------------------------- LIBARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; -- USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY tristate2 IS PORT ( input0, input1, input2, input3 : IN STD_LOGIC_VECTOR(7 DOWNTO 0); enable : IN STD_LOGIC_VECTOR(1 DOWNTO 0); output : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) ); END ENTITY tristate2; ARCHITECTURE BEHAV OF tristate2 IS BEGIN PROCESS ( enable, input0, input1, input2, input3 ) BEGIN IF enable = "00" THEN output <= input3; ELSE output <= ( OTHERS => 'Z' ); END IF; IF enable = "01" THEN output <= input2; ELSE output <= ( OTHERS => 'Z' ); END IF; IF enable = "10" THEN output <= input1; ELSE output <= ( OTHERS => 'Z' ); END IF; IF enable = "11" THEN output <= input0; ELSE output <= ( OTHERS => 'Z' ); END IF; END PROCESS; END ARCHITECTURE BEHAV;