VHDL code position: p145_ex5_22_scan_led Note: 1: the code is for multi-7 segment LED scan display coding 2: ------------------------------------------------------------------------------- LIBARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY scan_led IS PORT ( CLK : IN STD_LOGIC; SG : OUT STD_LOGIC_VECTOR ( 6 DOWNTO 0 ); -- segment control BT : OUT STD_LOGIC_VECTOR ( 6 DOWNTO 0 ) -- bit control ); END ENTITY scan_led; ARCHITECTURE BEHAV OF scan_led IS SGINAL CNT8 : STD_LOGIC_VECTOR ( 2 DOWNTO 0 ); SIGNAL A : INTEGER RANGE 0 TO 15; BEGIN P1: PROCESS ( CNT8 ) BEGIN CASE CNT8 IS WHEN "000" => BT <= "00000001"; A <=1; WHEN "001" => BT <= "00000010"; A <=3; WHEN "010" => BT <= "00000100"; A <=5; WHEN "011" => BT <= "00001000"; A <=7; WHEN "100" => BT <= "00010000"; A <=9; WHEN "101" => BT <= "00100000"; A <=11; WHEN "110" => BT <= "01000000"; A <=13; WHEN "111" => BT <= "10000000"; A <=15; WHEN OTHERS => NULL; END CASE; END PROCESS ledcoding; P2: PROCESS ( CLK ) BEGIN IF CLK'EVENT AND CLK = '1' THEN CNT8 <= CNT8 + 1; END IF; END PROCESS P2; P3: PROCESS ( A ) BEGIN CASE A IS WHEN 0 => BT <= "0111111"; -- 0 WHEN 1 => BT <= "0000110"; -- 1 WHEN 2 => BT <= "1011011"; -- 2 WHEN 3 => BT <= "1001111"; -- 3 WHEN 4 => BT <= "1100110"; -- 4 WHEN 5 => BT <= "1101101"; -- 5 WHEN 6 => BT <= "1111101"; -- 6 WHEN 7 => BT <= "0000111"; -- 7 WHEN 8 => BT <= "1111111"; -- 8 WHEN 9 => BT <= "1101111"; -- 9 WHEN 10 => BT <= "1110111"; -- A WHEN 11 => BT <= "1111100"; -- B WHEN 12 => BT <= "0111001"; -- C WHEN 13 => BT <= "1011110"; -- D WHEN 14 => BT <= "1111001"; -- E WHEN 15 => BT <= "1110001"; -- F WHEN OTHERS => NULL; END CASE; END PROCESS P3: END ARCHITECTURE BEHAV;