VHDL code position: p190_ex7_10_one_hot_FSM_alarm Note: 1: The code is for processing illegal state if one-hot FSM 2: ------------------------------------------------------------------------------- ............... alarm <= ( st0 AND ( st1 OR st2 OR st3 OR st4 OR st5 ) ) OR ( st1 AND ( st0 OR st2 OR st3 OR st4 OR st5 ) ) OR ( st2 AND ( st0 OR st1 OR st3 OR st4 OR st5 ) ) OR ( st3 AND ( st0 OR st1 OR st2 OR st4 OR st5 ) ) OR ( st4 AND ( st0 OR st1 OR st2 OR st3 OR st5 ) ) OR ( st5 AND ( st0 OR st1 OR st2 OR st3 OR st4 ) ); ................