合肥工业大学：EDA技术与应用（精品课程）：p223_ex8_10_overloaded_procedure_calcu

-- VHDL code position: p223_ex8_10_overloaded_procedure_calcu -- Note : This is code for explaining " OVERLOADED PROCEDURE " of VHDL -- Debug : no debug --------------------------------------------------------------------------------- PROCEDURE calcu ( v1, v2 : IN REAL; SIGNAL out1 : INOUT INTEGER ) ; PROCEDURE calcu ( v1, v2 : IN INREGER; SIGNAL out1 : INOUT REAL ) ; ...... cacul ( 20.15, 1.42, sign1 ); -- load frist "cacul"; cacul ( 23, 320, sign2 ); -- load second "cacul"; ......