-- VHDL code position: p280_ex9_22_concurrent_statement_procedure_adder
-- Note : This is code for explaing concurrent procedure call
-- in concurrent_statement of VHDL
--
-- See Also: example 9_22, 9_23, 9_24
-- Debug : no debug
---------------------------------------------------------------------------------
-- 7 kinds of concurrent statement:
-- 1) Concurrent Signal Assigment
-- 2) Proces Statement
-- 3) Block Statement
-- 4) Select Signal Assigment Statement
-- 5) Component Instantiations Statement
-- 6) Generate Statement
-- 7) Concurrent Procedure Calls Statement
-- BLOCK Concurrent Statement Syntax:
--
-- [ <Label> : ] [ POSTPONED ] <Procedure Name> [ ( <Actual Parameter Part> ) ] ;
--
--
-- Notes:
-- Label : 语句标号
-- POSTPONED : (后置代码)
-- Procedure Name : 过程名称
-- Actual Parameter Part : 实参表
--
......
PROCEDURE adder ( SIGNAL a, b : IN STD_LOGIC ;
SIGNAL sum : OUT STD_LOGIC
);
......
adder ( adder ( a1, b1, sum1 ); -- concurrent procedure call
......
PROCESS ( c1, c2 )
BEGIN
......
adder ( c1, c2, s1 ); -- sequential procedure call
......
END PROCESS;