合肥工业大学：EDA技术与应用（精品课程）：p282_ex924_1_concurrent_statement_Component_Instantiation

-- VHDL code position: p282_ex924_1_concurrent_statement_Component_Instantiation -- Note : This is code for explaing Component_Instantiation -- in concurrent_statement of VHDL -- -- See Also: no -- Debug : no debug --------------------------------------------------------------------------------- -- 7 kinds of concurrent statement: -- 1) Concurrent Signal Assigment -- 2) Proces Statement -- 3) Block Statement -- 4) Select Signal Assigment Statement -- 5) Component Instantiations Statement -- 6) Generate Statement -- 7) Concurrent Procedure Calls Statement -- Component Instantiations Statement Syntax: -- <Instantiation Label> : -- <Instantiated Unit> -- [ <Generic Map Aspect> ] -- [ <Port Map Aspect> ] ; -- -- Note: -- Instantiation Label : 语句标号 -- Instantiated Unit : 例化元件名称 -- Generic Map Aspect : 类属映射 -- Port Map Aspect : 端口映射 -- -- --